Excellicon Company Profile

Background

Overview

Founded in 2009 and headquartered in Laguna Hills, California, Excellicon is a privately funded Electronic Design Automation (EDA) company specializing in end-to-end timing constraints solutions. The company's mission is to streamline the timing constraints development process, ensuring efficient and accurate design flows for System-on-Chip (SoC) designs. Excellicon's vision is to provide comprehensive tools that automate constraints authoring, verification, and management, thereby reducing manual errors and accelerating time-to-market for semiconductor products.

Industry Significance

Excellicon has established itself as a key player in the EDA industry by addressing the complexities associated with timing constraints in SoC designs. Its innovative solutions have been adopted by leading semiconductor companies, contributing to more efficient design processes and higher-quality products.

Key Strategic Focus

Core Objectives

Automation of Timing Constraints: Develop tools that automate the creation, verification, and management of timing constraints to minimize manual intervention and errors.

Comprehensive Design Flow Integration: Ensure seamless integration of timing constraints solutions across all stages of the SoC design process, from RTL to GDS.

Areas of Specialization

Timing Constraints Authoring and Verification: Providing tools that facilitate the accurate creation and validation of timing constraints.

Clock Analysis: Offering solutions for comprehensive clock tree analysis to optimize design performance.

Key Technologies Utilized

Multi-Mode Approach: Employing a multi-mode methodology to address various design scenarios and requirements.

Formal Validation Techniques: Utilizing formal methods to ensure the correctness and completeness of timing constraints.

Primary Markets Targeted

Semiconductor Companies: Focusing on organizations involved in the design and manufacturing of complex SoCs.

EDA Tool Users: Catering to design engineers and teams seeking efficient timing constraints solutions.

Financials and Funding

Funding History

Excellicon is a privately funded company. Specific details regarding funding rounds and investors have not been publicly disclosed.

Acquisition by Siemens

On May 19, 2025, Siemens Digital Industries Software announced its agreement to acquire Excellicon. This strategic acquisition aims to integrate Excellicon's advanced timing constraints capabilities into Siemens' EDA portfolio, enhancing the overall design flow for SoC designers. The terms of the acquisition were not disclosed.

Pipeline Development

Product Portfolio

Excellicon's suite of products includes:

ConMan (Constraints Manager): Automates the authoring and management of timing constraints.

ConCert (Constraints Certifier): Provides verification and formal validation of timing constraints.

Exception-ToolBox (ET): Offers tools for handling exceptions in timing constraints.

Budgeting-ToolBox (BT): Facilitates budgeting and allocation of timing margins.

Equivalence-Checker (EQ): Ensures equivalence between different stages of design constraints.

ConTree: Provides a hierarchical view of constraints for better management.

ConStruct: Assists in constructing and organizing constraints efficiently.

Development Milestones

Excellicon has consistently expanded its product offerings and capabilities, leading to significant business growth. For instance, in the fiscal year ending April 30, 2016, the company reported over 400% growth in its install base and customer count, with revenues increasing by over 200%.

Technological Platform and Innovation

Proprietary Technologies

Excellicon's patented software is designed by semiconductor professionals for semiconductor professionals, focusing on:

End-to-End Timing Constraints Solutions: Covering the entire spectrum from authoring to formal validation.

Multi-Mode Approach: Addressing various design scenarios to ensure comprehensive coverage.

Significant Scientific Methods

Formal Validation Techniques: Ensuring the correctness and completeness of timing constraints through rigorous validation methods.

Clock Tree Analysis: Providing insights into partitioning schemes for optimal floorplans and timing.

Leadership Team

Key Executives

Himanshu Bhatnagar, CEO: With over 20 years of chip design experience, Himanshu has designed complex SoCs in networking, communications, and imaging. He authored "Advanced ASIC Chip Synthesis: Using Synopsys Design Compiler and PrimeTime" and has served as an advisory board member for several EDA companies. His expertise ensures the development of tools tailored for front and back-end engineers.

Peter Petrov, PhD; CTO & Founder, VP Engineering: Bringing over 18 years of academic and industry experience, Peter has developed breakthrough technology in constraints creation, verification, and management. His goal is to ensure products are developed based on user needs and perspectives.

Rick Eram, VP of Sales and Operations: With over 20 years of hands-on experience in the EDA industry, Rick has been instrumental in two IPOs with Analogy and Magma. At Atrenta, he developed marketing strategies adopted company-wide. His background includes developing efficient teams addressing customer needs on both business and technical fronts.

Leadership Changes

As of May 19, 2025, following the acquisition by Siemens Digital Industries Software, Excellicon's leadership team is expected to integrate into Siemens' organizational structure. Specific details regarding leadership changes have not been publicly disclosed.

Competitor Profile

Market Insights and Dynamics

The EDA industry is characterized by rapid technological advancements and increasing design complexities. The demand for efficient timing constraints solutions is driven by the need for faster time-to-market and higher-quality semiconductor products.

Competitor Analysis

Excellicon's competitors include:

OrbAstro: A space technology company providing satellite solutions.

MagicCubeSat: Engaged in satellite development solutions.

Industrial Measurement Systems: Develops equipment for thermometry and measurement of elastic constants.

AutomationWare: Produces mechatronic components and develops robotics solutions.

While these companies operate in related technological fields, Excellicon's specialized focus on timing constraints solutions for SoC designs sets it apart in the EDA industry.

Strategic Collaborations and Partnerships

Samsung Advanced Foundry Ecosystem (SAFE™)

In November 2021, Excellicon's products were included in Samsung's SAFE™, a verified EDA solutions lineup employed by Samsung's foundry team. This collaboration aims to help customers from early concept to large-scale manufacturing by simplifying the timing constraints design process and shortening design cycles.

ESD Alliance Membership

In March 2022, Excellicon joined the Electronic System Design (ESD) Alliance, a SEMI Technology Community. This membership provides Excellicon with networking opportunities and brand exposure through SEMI's global presence.

Operational Insights

Strategic Considerations

Excellicon's comprehensive timing constraints solutions provide a distinct competitive advantage by addressing gaps in constraints development and management. The company's focus on automation and formal validation techniques enhances design efficiency and reduces the risk of errors, positioning it favorably in the EDA market.

Strategic Opportunities and Future Directions

Integration with Siemens

The acquisition by Siemens Digital Industries Software presents opportunities for Excellicon to integrate its advanced timing constraints capabilities into Siemens' broader EDA portfolio. This integration is expected to enhance Siemens' offerings in SoC design flows, providing customers with improved power, performance, and area (PPA) metrics, and accelerating design closure.

Expansion of Product Offerings

Leveraging Siemens' resources and global reach, Excellicon has the opportunity to expand its product offerings and enter new markets, further solidifying its position as a leader in timing constraints solutions.