Vikram Haravu

Design Verification Consultant @ Siemens Digital Industries Software Functional Verification Engineer at Siemens (Mentor Graphics)

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Education

Udacity

Nanodegree, Machine Learning Engineer 2017-01-01 - 2018-01-01

Rutgers University

MSEE, Computer Engineering 1995-01-01 - 1997-01-01

Osmania University

B.E., Electrical Engineering 1990-01-01 - 1994-01-01

Work Experience

Siemens Digital Industries Software

Current

Siemens Digital Industries Software

Broadcom

2020-09-01 - 2021-08-01

Broadcom

Intel Corporation

2018-07-01 - 2020-08-01

Intel Corporation

Qualcomm

2008-01-01 - 2018-06-01

Qualcomm

Intel Corporation

2004-01-01 - 2008-01-01

Intel Corporation

LSI, an Avago Technologies Company

2001-01-01 - 2003-01-01

LSI, an Avago Technologies Company

Golden Bridge Tech. (Acquired by Intel)

2000-01-01 - 2001-01-01

Golden Bridge Tech. (Acquired by Intel)

Nokia

1997-01-01 - 2000-01-01

Nokia

Skills

Formal Verification VLSI SystemVerilog RTL design RTL coding PCIe ASIC Verilog Integrated Circuit Design ModelSim Computer Architecture Open Verification Methodology Microprocessors UVM Cadence ICFB Perl Design Verification Testing RTL Coding RTL Design Machine Learning

Summary

• Extensive experience in design and verification of VLSI ICs. • Experienced with DV of digital as well as mixed-signal ICs. • Very well versed with DV using UVM and SystemVerilog. • Experienced with Formal Property Techniques with Jasper. • Active contributor in the development process from architecture to tape-out and silicon bring-up. • Problem solving with innovative and creative solutions. • Machine Learning enthusiast and practitioner

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